FAZE - SH2 compatibility

**fox68k** · March 1st, 2007, 08:29

Hi,

although this message was intented to vbt (Saturn coder), i thought it could be interesting for some other people, so here i go.

Getting rid off the SH4 opcodes missing in SH2 was easy. Now, you can turn SH2 compatibility with a generation switch. So that is over.

The pending subject is endianness. SH2 is big endian and SH4 endianness selectable, but, unfortunately, fixed to little endian for the Dreamcast. So memory accesses have to be modified. I will need some help to get this up and running because i do not have any way to test it out.

Anyway, here is the SH2 compliant FAZE (endianness not ready yet): www.m68k.com/faze/faze-01032007.tar.bz2.

vbt, get in contact with me to see when we could put our hands on this.

Regards.

**vbt** · March 1st, 2007, 21:26

I'll try to test this week end

About making the emu endianness, I can compare result with a debug PC version of SMS plus. Also cz80 had a good endian support, just one or two things were modifed, it can give a good idea of things to do.
Thanks for your help. I'm sure some devs can be interrested with that SH2 version of FAZE

**vbt** · March 3rd, 2007, 21:20

I've lost time to generate the raze.s file because I didn't know the m4 tool. Now the object is generated without any error

thanks to your changes. It's time to replace the current core with this one and the problems will start

**vbt** · March 5th, 2007, 19:46

Here is what is done :

Cz80_Exec(&Cz80_struc,228); => z80_emulate(228);

Cz80_Reset(&Cz80_struc); => z80_reset();

Cz80_Clear_IRQ(&Cz80_struc); => z80_lower_IRQ();

Cz80_Set_IRQ(&Cz80_struc, 0); => z80_raise_IRQ(0);

Cz80_struc.CycleIO => z80_get_cycles_elapsed() ?

Cz80_Set_IRQ_Callback(&Cz80_struc,sms_irq_callback ); => ??

Cz80_Set_Fetch(&Cz80_struc, 0x8000, 0xBFFF, (u32)&sms.sram[offset]); => z80_map_fetch(0x8000, 0xBFFF, (u32)&sms.sram[offset]);

Cz80_Set_ReadB(&Cz80_struc,&cpu_readmem8); => z80_add_read(0x0000, 0xFFFF, Z80_MAP_HANDLED, &cpu_readmem8);

Cz80_Set_WriteB(&Cz80_struc,&cpu_writemem8); => z80_add_write(0x0000, 0xFFFF, Z80_MAP_HANDLED, &cpu_writemem8);

Cz80_Set_INPort(&Cz80_struc,(CZ80_READ *)&cz80_z80_readport16); => z80_set_in(&cz80_z80_readport16);

Cz80_Set_OUTPort(&Cz80_struc,(CZ80_WRITE *)&cz80_z80_writeport16); => z80_set_out(&cz80_z80_writeport16);

Cz80_Init(&Cz80_struc); => z80_init_memmap();

Cz80_Set_Fetch(&Cz80_struc,0x0000,0x3FFF,(u32)((vo id *)&cart.rom[0x0000])); => z80_map_fetch(0x0000, 0x7FFF, (u32)&cart.rom[0x0000]);

.. => z80_end_memmap();

changes on raze.reg

define(`zIXh',`@(_z80_IX - REF,REF_REG)') ! byte [_z80_IX]
define(`zIXl',`@(_z80_IX - REF+1,REF_REG)') ! byte [_z80_IX+1]
define(`zIYh',`@(_z80_IY - REF,REF_REG)') ! byte [_z80_IY]
define(`zIYl',`@(_z80_IY - REF+1,REF_REG)') ! byte [_z80_IY+1]

define(`hzSP',`@(_z80_SP - REF, REF_REG)') ! byte [_z80_SP]
define(`lzSP',`@(_z80_SP - REF+1,REF_REG)') ! byte [_z80_SP+1]

after 10 cycles on CZ80 :

faffff bc0 de0 hl0 pc3 spffff

on raze :

af0 bc0 de10000 hl10000 pc2 sp0

after a reset :
af=0x4000 0000

**fox68k** · March 7th, 2007, 08:41

We should track every operation against a working core. Also, you cannot run 10 cycles at once, but 1 at a time, to execute opcode per opcode and see what is going on there for each instruction.

So the way to go could be:

reset both cores

loop
execute 1 opcode (emulate 1)
until results were different

and comparing the resulting CPU state after every operation. If one operation fails, is time to decode the instruction and see if it has any memory access and so on.

I would like to set up a date to talk and work on this on an instant messenger.

**vbt** · March 11th, 2007, 15:45

ok, tell me whe you have some free time and we will see.. I'm on msn and on irc.

**zodttd** · March 15th, 2007, 08:19

This is definitely interesting!

I've been hearing the FAZE project mentioned here and there.

Nice to see you Fox.

I've heard good things about you from Unai and Chui when we were working on psx4all.

If there's some way I can help let me know. I am unable to check here very often, so a PM would be best with your MSN.

I'm sort of lost as to what FAZE is being implemented in, but I'm really interested none-the-less! So much hardware used it!